05-08-2014, 07:32 AM
I've given Q2 of 2013 a go. Have lumped part a and b into a table format as I believe this would be more readable. Would appreciate any comments!
2013 Q2 Response Time of Train Detection Systems
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05-08-2014, 07:32 AM
I've given Q2 of 2013 a go. Have lumped part a and b into a table format as I believe this would be more readable. Would appreciate any comments!
The tabular presentation is good.
The things which you have listed under "risks" seem to be "hazards"- whereas you may take the view that you have listed what the IRSE examiners may be expecting, you should at least word to show you know the difference. There is not enough here for a 30 minute answer.
Hence generally along the right lines but not as good an answer as it should be. A few suggestions of things that could be relevant- a) Intermixing of different types of track circuits of different speeds of response (some such delays are an inherent consequence of an element of the design such as Reed filters, whereas for the TI21 / Ebitrack the delay is deliberately included as a means of providing immunity to false operation) but what happens where a TC of one category is adjacent to one of a different category? b) the boundary between axle counter and track circuit train detection, c) the boundary between axle counter sections determined by one Evaluator and those from a different ACE, d) an interlocking area that actually comprises two separate electronic interlockings adjacent, as for example two SSIs with a cross-boundary internal data link and the need for a track section in the one to be copied across to be a duplicate track identity in the other, e) an AHBC level crossing with much of the logic implemented within an electronic interlocking which gathers its trackside inputs such as track circuit and treadle operation from a system involving scanning,for example SSI with its TFMs- it can be extremely critical how the TFM identity modules are allocated when using these inputs to establish directionality of a train passing over the roadway. Even in relay circuit operation, I have frequently found problems in operation arising due to the fact that the designer forgets that a treadle takes some 8 seconds to re-establish its QNR contacts after the last vehicle of the train has completely passed clear of it and it is no longer being depressed, f) a train in ETCS Level 2 is given an Movement Authority which is updated via radio from information passed to the RBC from the interlocking. When the train passes a node positioned at the end of a track section, it will occupy the following track section of the lineside train detection and therefore this node will be closed (equivalent to replacing a signal by occupancy of the stick track). If the EVC on board the train sees the resultant loss of this MA before it believes (from what it knows from its odometry from passing balises and then counting wheel revolutions etc.) that it has passed the relevant track position, it will interpret this as a demand for an emergency brake intervention. Conversely if the system is instead made too tolerant of positional discrepancy in order to avoid such self-reversion problems then in the scenario of an intended loss of MA (e.g. an emergency situation or failure of train detection, point detection etc) occurring whilst the train is still on the approach to the node position will mean that it will be ignored on the false assumption that it is "situation normal" rather than an urgent demand to stop- the equivalent of a driver completely ignoring a signal reverting to red whilst approaching it, g) a boundary between signaller's areas at separate control centres where the one has to give a slot to the other to signify for example their permission to signal a train towards them on a single or reversible line- what considerations are needed to ensure that there is no "time window" following A's withdrawal of permission during which B can still make use of the release yet A can do something which conflicts, h) an electronic processor system which implements the equivalent of the simulated RRI would have been but is really implementing instructions relay circuits via "ladder logic" isn't actually the "parallel processor" that serially and sequentially; the order of the "rungs" of the ladder logic can be absolutely critical to the functionality of what is achieved. Note that as written neither g) nor h) directly relates to train detection. In the exam you must convince the examiners that al parts of your answer are strictly relevant to the question as asked, so I suggest you would have to give an example of the issue which involves involves train detection- so in g) one might explain the scenario in which A chooses to withdraw their slot just at the very moment a train enters the Approach locking lookback area of B's signal for example, thus making specific the more general issue. Therefore whilst your lines of entry in the table started well enough, there should have been rather more of them. I am not saying that you needed to have all the above, but you did need more and crucially ensure that there was one example that addressed each element of the question wording (delays within equipment / delays in transmission, slow / variable delays, within a system, between systems). I think for section c) of the question set the examiners were thinking of things such as "tracks occupies out of sequence" alarms and the related but special case of a SPAD detection system that might not only alert the signaller but replace the signal aspects in the area as an emergency response to what appeared to be a signal having been passed at danger but potentially could just have been a false alarm given the difference between the control system's view of the world and the actual on-site reality. (05-08-2014, 07:32 AM)greatnessjason Wrote: I've given Q2 of 2013 a go. Have lumped part a and b into a table format as I believe this would be more readable. Would appreciate any comments!
PJW
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