Ramanjaneyulu MUDDAVARAM
(Newbie)


Registration Date: 05-01-2015
Date of Birth: Not Specified
Local Time: 29-03-2024 at 07:19 AM
Status: Offline

Ramanjaneyulu MUDDAVARAM's Forum Info
Joined: 05-01-2015
Last Visit: 20-11-2022, 11:18 PM
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Time Spent Online: 3 Hours, 3 Minutes, 43 Seconds
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Additional Info About Ramanjaneyulu MUDDAVARAM
Exam intentions:
  • Module 1
  • Module 2
  • Module 3
  • Module 5
IRSE member (class)?: Associate Member
Job Role: Signalling Designer
Location: Australia
Railway Administration: Australia (Victoria)
Bio: I have been working as Signalling design engineer for more than 15 years in various fields of Railway Signalling and have fair insight working experience in Panel Interlocking, Route Relay Interlocking (RRI) and Solid State Interlocking (Microlok-II) Systems .
I have worked for Indian Railways, Australian Railways and UK Railways projects.
I do hold IRSE Signalling Designer (1.1.510v1) and Signalling Design Verifier (1.1.160v3) licenses. I would like to Sit for IRSE-Exams as it part of my career development plan.
Sex:
  • Male
English :
  • Language of Education